From: Ian Campbell Date: Wed, 26 Mar 2014 13:38:37 +0000 (+0000) Subject: xen: arm32: resync bitops with Linux v3.14-rc7 X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~5294 X-Git-Url: https://dgit.raspbian.org/%22http://www.example.com/cgi/%22/%22http:/www.example.com/cgi/%22?a=commitdiff_plain;h=7baf9ace8faa95700a5d7a537e2b2b4f2cab6bab;p=xen.git xen: arm32: resync bitops with Linux v3.14-rc7 This pulls in the following Linux commits: commit c36ef4b1762302a493c6cb754073bded084700e2 Author: Will Deacon Date: Wed Nov 23 11:28:25 2011 +0100 ARM: 7171/1: unwind: add unwind directives to bitops assembly macros The bitops functions (e.g. _test_and_set_bit) on ARM do not have unwind annotations and therefore the kernel cannot backtrace out of them on a fatal error (for example, NULL pointer dereference). This patch annotates the bitops assembly macros with UNWIND annotations so that we can produce a meaningful backtrace on error. Callers of the macros are modified to pass their function name as a macro parameter, enforcing that the macros are used as standalone function implementations. Acked-by: Dave Martin Signed-off-by: Will Deacon Signed-off-by: Russell King commit d779c07dd72098a7416d907494f958213b7726f3 Author: Will Deacon Date: Thu Jun 27 12:01:51 2013 +0100 ARM: bitops: prefetch the destination word for write prior to strex The cost of changing a cacheline from shared to exclusive state can be significant, especially when this is triggered by an exclusive store, since it may result in having to retry the transaction. This patch prefixes our atomic bitops implementation with prefetchw, to try and grab the line in exclusive state from the start. The testop macro is left alone, since the barrier semantics limit the usefulness of prefetching data. Acked-by: Nicolas Pitre Signed-off-by: Will Deacon commit b7ec699405f55667caeb46d96229d75bf33a83ad Author: Will Deacon Date: Tue Nov 19 15:46:11 2013 +0100 ARM: 7893/1: bitops: only emit .arch_extension mp if CONFIG_SMP Uwe reported a build failure when targetting a NOMMU platform with my recent prefetch changes: arch/arm/lib/changebit.S: Assembler messages: arch/arm/lib/changebit.S:15: Error: architectural extension `mp' is not allowed for the current base architecture This is due to use of the .arch_extension mp directive immediately prior to an ALT_SMP(...) instruction. Whilst the ALT_SMP macro will expand to nothing if !CONFIG_SMP, gas will still choke on the directive. This patch fixes the issue by only emitting the sequence (including the directive) if CONFIG_SMP=y. Tested-by: Uwe Kleine-König Signed-off-by: Will Deacon Signed-off-by: Russell King Signed-off-by: Ian Campbell Acked-by: Julien Grall Acked-by: Tim Deegan --- diff --git a/xen/arch/arm/arm32/lib/bitops.h b/xen/arch/arm/arm32/lib/bitops.h index 689f2e8665..25784c3354 100644 --- a/xen/arch/arm/arm32/lib/bitops.h +++ b/xen/arch/arm/arm32/lib/bitops.h @@ -1,13 +1,20 @@ #include #if __LINUX_ARM_ARCH__ >= 6 - .macro bitop, instr + .macro bitop, name, instr +ENTRY( \name ) +UNWIND( .fnstart ) ands ip, r1, #3 strneb r1, [ip] @ assert word-aligned mov r2, #1 and r3, r0, #31 @ Get bit offset mov r0, r0, lsr #5 add r1, r1, r0, lsl #2 @ Get word offset +#if __LINUX_ARM_ARCH__ >= 7 && defined(CONFIG_SMP) + .arch_extension mp + ALT_SMP(W(pldw) [r1]) + ALT_UP(W(nop)) +#endif mov r3, r2, lsl r3 1: ldrex r2, [r1] \instr r2, r2, r3 @@ -15,9 +22,13 @@ cmp r0, #0 bne 1b bx lr +UNWIND( .fnend ) +ENDPROC(\name ) .endm - .macro testop, instr, store + .macro testop, name, instr, store +ENTRY( \name ) +UNWIND( .fnstart ) ands ip, r1, #3 strneb r1, [ip] @ assert word-aligned mov r2, #1 @@ -36,6 +47,8 @@ cmp r0, #0 movne r0, #1 2: bx lr +UNWIND( .fnend ) +ENDPROC(\name ) .endm #else .macro bitop, name, instr diff --git a/xen/arch/arm/arm32/lib/changebit.S b/xen/arch/arm/arm32/lib/changebit.S index 62954bcd07..11f41d2bd6 100644 --- a/xen/arch/arm/arm32/lib/changebit.S +++ b/xen/arch/arm/arm32/lib/changebit.S @@ -13,6 +13,4 @@ #include "bitops.h" .text -ENTRY(_change_bit) - bitop eor -ENDPROC(_change_bit) +bitop _change_bit, eor diff --git a/xen/arch/arm/arm32/lib/clearbit.S b/xen/arch/arm/arm32/lib/clearbit.S index 42ce41656d..1b6a5691f8 100644 --- a/xen/arch/arm/arm32/lib/clearbit.S +++ b/xen/arch/arm/arm32/lib/clearbit.S @@ -14,6 +14,4 @@ #include "bitops.h" .text -ENTRY(_clear_bit) - bitop bic -ENDPROC(_clear_bit) +bitop _clear_bit, bic diff --git a/xen/arch/arm/arm32/lib/setbit.S b/xen/arch/arm/arm32/lib/setbit.S index c828851553..1f4ef5659b 100644 --- a/xen/arch/arm/arm32/lib/setbit.S +++ b/xen/arch/arm/arm32/lib/setbit.S @@ -13,6 +13,4 @@ #include "bitops.h" .text -ENTRY(_set_bit) - bitop orr -ENDPROC(_set_bit) +bitop _set_bit, orr diff --git a/xen/arch/arm/arm32/lib/testchangebit.S b/xen/arch/arm/arm32/lib/testchangebit.S index a7f527cd98..7f4635caa2 100644 --- a/xen/arch/arm/arm32/lib/testchangebit.S +++ b/xen/arch/arm/arm32/lib/testchangebit.S @@ -13,6 +13,4 @@ #include "bitops.h" .text -ENTRY(_test_and_change_bit) - testop eor, str -ENDPROC(_test_and_change_bit) +testop _test_and_change_bit, eor, str diff --git a/xen/arch/arm/arm32/lib/testclearbit.S b/xen/arch/arm/arm32/lib/testclearbit.S index 8f39c72936..4d4152fda8 100644 --- a/xen/arch/arm/arm32/lib/testclearbit.S +++ b/xen/arch/arm/arm32/lib/testclearbit.S @@ -13,6 +13,4 @@ #include "bitops.h" .text -ENTRY(_test_and_clear_bit) - testop bicne, strne -ENDPROC(_test_and_clear_bit) +testop _test_and_clear_bit, bicne, strne diff --git a/xen/arch/arm/arm32/lib/testsetbit.S b/xen/arch/arm/arm32/lib/testsetbit.S index 1b8d273100..54f48f9afa 100644 --- a/xen/arch/arm/arm32/lib/testsetbit.S +++ b/xen/arch/arm/arm32/lib/testsetbit.S @@ -13,6 +13,4 @@ #include "bitops.h" .text -ENTRY(_test_and_set_bit) - testop orreq, streq -ENDPROC(_test_and_set_bit) +testop _test_and_set_bit, orreq, streq